The present invention generally relates to processing a semiconductor substrate. In particular, the present invention relates to controlling and/or mitigating thermal expansion as it may occur on a mask substrate during a photolithography process.
Achieving the objectives of miniaturization and higher packing densities continue to drive the semiconductor manufacturing industry toward improving semiconductor processing in every aspect of the fabrication process. Several factors and variables are involved in the fabrication process. For example, at least one and typically more than one photolithography process may be employed during the fabrication of a semiconductor device. Each factor and variable implemented during fabrication must be considered and improved in order to achieve the higher packing densities and smaller, more precisely formed semiconductor structures.
In general, lithography refers to processes for pattern transfer between various media. It is a technique used for integrated circuit fabrication in which a silicon slice, the wafer, is coated uniformly with a radiation-sensitive film, the photoresist, and an exposing source (such as optical light, X-rays, or an electron beam) illuminates selected areas of the surface through an intervening master template, the photoresist mask, for a particular pattern. The lithographic coating is generally a radiation-sensitized coating suitable for receiving a projected image of the subject pattern. Once the image is projected, it is indelibly formed in the coating. The projected image may be either a negative or a positive of the subject pattern. Exposure of the coating through the photoresist mask causes a chemical transformation in the exposed areas of the coating thereby making the image area either more or less soluble (depending on the coating) in a particular solvent developer. The more soluble areas are removed in the developing process to leave the pattern image in the coating as less soluble polymer. The resulting pattern image in the coating, or layer, may be at least one portion of a semiconductor device that contributes to the overall structure and function of the device.
With the advancement of semiconductor fabrication techniques toward smaller, more densely packed features comes increased demands for processing with shorter wavelengths of light and thinner photoresist materials. For example, in order to achieve smaller feature dimensions, wavelengths in the extreme ultraviolet (EUV) range of about 5 to about 25 nm are being employed in association with EUV masks. Such EUV masks can then be used to transfer images to underlying layers of material to form structures characterized by smaller dimensions.
Typically, chrome and nitride are used to form EUV masks. However, these are reflective materials and thus, are more difficult to produce precisely sized as well as smaller sized features therein. As a result, maintaining the precision and accuracy as well as achieving the smaller size dimensions are critical in the manufacture of EUV masks. Similar concerns are abundant with regard to other types of mask substrates.
The fidelity of the feature pattern emblazoned on the mask must be preserved at all times during formation of the mask and more importantly, when transferring the feature pattern from the mask to an underlying wafer to produce the device product.
Masks such as EUV masks afford the opportunity to create extremely small dimensioned features with precision on a wafer. However, due to the wavelengths and materials associated with mask photolithography, the light incident on the mask during the pattern transfer process yields heat in amounts not typically associated with other types of photolithography which use, for example, DUV light and the like. In particular, as a wavelength of light decreases, the energy of the wavelength of light increases. Thus, absorbing such smaller wavelengths of light tends to generate or build up increasing amounts of heat in a mask. This heat results in a translation expansion or thermal expansion of the mask. Consequently, the integrity of the EUV mask is compromised during wafer processing.
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is not intended to identify key/critical elements of the invention or to delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention provides a system and method for controlling thermal expansion as it may occur on a mask substrate during a mask photolithography process. More specifically, the system and method of the present invention involve mitigating excessive heat accumulation on the mask during a wafer exposure process in order to maintain the fidelity of the mask feature pattern when transferred from the mask to the wafer. This is accomplished in part by monitoring the mask during the wafer exposure process. In particular, a front surface and/or top surface of the mask may be measured using a scatterometer in order to detect thermal expansion on the mask, and especially at a particular grating of the mask.
Measurements maybe taken periodically, randomly, or at timed intervals in order to optimize the control of thermal expansion on the mask. In order to mitigate thermal expansion, the mask, as a whole or at least a portion thereof, may be treated in a cooling chamber and/or cooled in order to decrease the amount of heat accumulated on the mask. The cooled mask may be used again during a subsequent exposure of the wafer. Alternatively, or in addition, data generated corresponding to the thermal expansion detected on the mask can be fed forward to control thermal expansion in future photolithography processes. Furthermore, an amount of thermal expansion may be desired. Thus, the present invention facilitates obtaining a controlled amount of thermal expansion on mask substrates such as I-line, DUV, EUV, and G-line masks.
One aspect of the present invention relates to a system for controlling thermal expansion on a mask substrate during photolithography. The system includes a photolithography system comprising an irradiation source and a mask, whereby heat accumulates on at least a portion of the mask while irradiating one or more layers of an underlying wafer; a mask inspection system for monitoring one or more gratings on the mask to detect expansion therein, the mask inspection system producing data relating to the mask; and a temperature control system operatively coupled to the mask inspection system and the photolithography system for making adjustments to the photolithography system in order to compensate for the detected expansion on the mask.
Another aspect of the present invention relates to a system for controlling thermal expansion on a mask during photolithography. The system includes a photolithography system comprising an irradiation source and a mask substrate, whereby heat accumulates on at least a portion of the mask substrate while irradiating one or more layers of a wafer; a mask inspection system for monitoring and measuring the one or more gratings on the mask substrate to detect expansion therein, the mask inspection system producing data relating to the mask substrate; a processor operatively connected to the mask inspection system for processing and analyzing the data produced by the inspection system, thereby generating output related to the detected expansion on the mask; an mask temperature control system for receiving output generated by the processor in order to make an adjustment to one or more mask photolithography components to thereby compensate for the detected expansion in one or more of gratings on the mask; and a mask cooling system operatively connected to the EUV mask temperature control system for mitigating the accumulated heat on the mask.
Yet another aspect of the present invention relates to a method for controlling thermal expansion on a mask substrate during a photolithography process. The method involves providing a semiconductor structure having a patterned mask substrate thereover, the patterned mask substrate having one or more gratings therein; exposing the semiconductor structure through the one or more gratings of the patterned mask with a wavelength of light during a wafer exposure process; and monitoring the one or more gratings of the patterned mask for thermal expansion in order to generate data related to the one or more gratings.